Architecting AI Chips Using IDesignSpec

As you may have gathered from my recent posts on related topics, artificial intelligence (AI) is very important for both Agnisys and our customers. The exponentially increasing demand for AI is driving a boom in the development of chips to support AI algorithms. As our users focus more and more on AI, we’ve evolved our products to help them be successful. In this post, I’d like to touch on some of the many ways that our IDesignSpec™ (IDS) Suite helps you develop AI chips.

What AI Chip Developers Need
For today’s discussion, let’s focus on two aspects of AI chip design: development of core AI engines and chip assembly and rapid exploration of AI architectures. The core engines are usually connected to a central CPU that controls their operation. This arrangement requires the use of high-performance buses to interface between the CPU and the AI engines. The CPU is responsible for providing the weights and hyperparameters required by AI algorithms.

Initialization, configuration, and management of these values is handled via the hardware-software interface (HSI) between the software running on the CPU and the AI hardware. Within the AI engines themselves, state machines are important design elements. Finally, it must be possible to assemble all the pieces together into a complete AI chip. Making this process automatic enables rapid exploration of architectural options and facilitates interaction with physical chip design and version control systems.